1. Field of the Disclosure
The present disclosure relates to electronic devices and processes, and more particularly to electronic devices comprising gate electrodes including at least two portions.
2. Description of the Related Art
State-of-the-art semiconductor devices can include transistors having a gate dielectric layer with one or more high dielectric constant (“high-k”) materials. These materials typically have a dielectric constant higher than the silicon nitride, which is approximately 7.8. An exemplary high-k gate dielectric material can include one or more oxides of Group 3, 4, and, 5 elements. An interface layer can lie between the primary surface of the substrate and the gate dielectric layer. The interface layer can be at least approximately 1.8 nm in thickness.
As thickness of the gate dielectric is reduced, the relative contribution of the interface layer to the total capacitance is increased. Problems with the interface layer and attempts to reduce its thickness are known in the art. Attempts to reduce the thickness of the interface layer have focused on substrate preparation before forming the gate dielectric layer, and materials and formation techniques for the gate dielectric layer.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention.